1. Field of the Invention
The present invention relates to a semiconductor structure and manufacturing method thereof, and more particularly, to a semiconductor structure with a lateral through silicon via (TSV) and a manufacturing method thereof.
2. Description of the Prior Art
In modern society, the micro-processor systems constituted of integrated circuits (IC) are multi-purpose devices, and are utilized in diverse fields such as automatic control electronics, mobile communication devices and personal computers. With the development of technology and the increasingly imaginative applications of electrical products, the IC devices are becoming smaller, more sophisticated and more diversified.
As known in the art, an IC device is produced from dies that are fabricated by conventional semiconductor manufacturing processes. The process to manufacture a die starts with a wafer: first, different regions are marked on the wafer; secondly, conventional semiconductor manufacture processes such as deposition, photolithography, etching or planarization are used to form needed circuit trace (s); then, each region of the wafer is separated to form a die and packaged to form a chip; finally, the chip is attached onto a board, for example a printed circuit board (PCB), and the chip is electrically coupled to the pins on the PCB. Thus, each program on the chip can be performed.
In order to evaluate the functions and the efficiency of the chip, to increase the capacitance density, to accommodate more IC components in a limited space, many semiconductor package technologies are built up by stacking each die and/or chip, for example, Flip-Chip technology, Multi-chip Package (MCP) technology, Package on Package (PoP) technology and Package in Package (PiP) technology. Besides these technologies, a “Through Silicon Via (TSV)” technique has been developed in recent years. The TSV technology can improve the interconnections between chips in the package so as to increase the package efficiency.
By using the TSV technique, there can be a shorter interconnection route between the chips. Thus, in comparison to other technologies, TSV has the advantages of faster speed, less noise and better efficiency, and is therefore a promising technology. However, the current existing TSV is usually stacked in a vertical configuration, as a primary transmission route. It is now still impossible to use three-dimensional stacked structure having multiple stacking directions, which is substantially limiting the applicability of TSV.